Formal Verification

We cite the various papers produced in the last year in the verification area by our group, and give a short summary of each. We divide these into BDD Related Techniques, Timing Issues and General Methods.
BDD RELATED TECHNIQUES:

• Decomposition Techniques for Efficient ROBDD Construction
• A Study of Composition Schemes for Mixed Apply/Compose Based Construction of ROBDDs
• Early Quantification and Partitioned Transition Relations
• BDD Minimization by Truth Table Permutations
• Canonical TBDDs: A New Data Structure for Boolean Functions
• High Performance BDD Package Based on Exploiting Memory Hierarchy
• Using Network of Workstations for Efficient Binary Decision Diagram Manipulation
• Dynamic Variable Reordering in a Breadth-First Based BDD Package: Challenges and Solutions
• Timed Binary Decision Diagrams
• Efficient Identification of Non-Robustly Untestable Path Delay Faults
• Temporal Flexibility in Combinational Circuits
• Hierarchical Timing Analysis Under the XBD0 Model
• Approximate Timing Analysis Under the XBD0 Model
• VIS: A System for Verification and Synthesis
• Verification Using Uninterpreted Functions and Finite Instantiations
• Verifying Linear Temporal Properties of Data Insensitive Controllers Using Finite Instantiations
• Optimizing Symbolic Execution of ICS Models Using State Reduction
• Validity Checking in the Theory of Equality with Uninterpreted Functions Using Finite Instantiations
• Verifying Abstractions of Timed Systems
• STARI: A Case Study in Compositional and Hierarchical Timing Verification